Reuse Techniques for VLSI Design

2.2 INTRODUCTION Macro-block reuse is the only way to build robust million-gate chips in a reasonable amount of time. For that reason, design reuse is becoming a hot topic. Several methodologies for reuse have been published, ...

Author: Ralf Seepold

Publisher: Springer Science & Business Media

ISBN: 9781461551591

Category: Technology & Engineering

Page: 153

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Reuse Techniques for VLSI Design is a reflection on the current state of the art in design reuse for microelectronic systems. To that end, it is the first book to garner the input of leading experts from both research and application areas. These experts document herein not only their more mature approaches, but also their latest research results. Firstly, it sets out the background and support from international organisations that enforce System-on-a-Chip (SoC) design by reuse- oriented methodologies. This overview is followed by a number of technical presentations covering different requirements of the reuse domain. These are presented from different points of view, i.e., IP provider, IP user, designer, isolated reuse, intra-company or inter-company reuse. More general systems or case studies, e.g., metrics, are followed by comprehensive reuse systems, e.g., reuse management systems partly including business models. Since design reuse must not be restricted to digital components, mixed- signal and analog reuse approaches are also presented. In parallel to the digital domain, this area covers research in reuse database design. Design verification and legal aspects are two important topics that are closely related to the realization of design reuse. These hot topics are covered by presentations that finalize the survey of outstanding research, development and application of design reuse for SoC design. Reuse Techniques for VLSI Design is an invaluable reference for researchers and engineers involved in VLSI/ASIC design.
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Virtual Components Design and Reuse

R. Seepold and A. Kunzmann, Reuse Techniques for VLSI Design, Kluwer Academic Publishers, March 1999. ISBN 0-7923–8476-8. R. Seepold, N. Martínez Madrid and W. Rosenstiel, "Reuse of Virtual Components in System-on-Chip Environments", ...

Author: Ralf Seepold

Publisher: Springer Science & Business Media

ISBN: 9781475732757

Category: Technology & Engineering

Page: 230

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Design reuse is not just a topic of research but a real industrial necessity in the microelectronic domain and thus driving the competitiveness of relevant areas like for example telecommunication or automotive. Most companies have already dedicated a department or a central unit that transfer design reuse into reality. All main EDA conferences include a track to the topic, and even specific conferences have been established in this area, both in the USA and in Europe. Virtual Components Design and Reuse presents a selection of articles giving a mature and consolidated perspective to design reuse from different points of view. The authors stem from all relevant areas: research and academia, IP providers, EDA vendors and industry. Some classical topics in design reuse, like specification and generation of components, IP retrieval and cataloguing or interface customisation, are revisited and discussed in depth. Moreover, new hot topics are presented, among them IP quality, platform-based reuse, software IP, IP security, business models for design reuse, and major initiatives like the MEDEA EDA Roadmap.
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System Level Design Model with Reuse of System IP

Kission P., Jerraya A., Behavioral design allowing modularity and component reuse. Journal of Microelectronic Systems ... Proceedings of 2nd GI/ITG/GMM Workshop of Reuse Techniques for VLSI Design; 1998 September; Karlsruhe. Germany.

Author: Patrizia Cavalloro

Publisher: Springer Science & Business Media

ISBN: 9780306487330

Category: Technology & Engineering

Page: 211

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This book addresses system design, providing a framework for assessing and developing system design practices that observe and utilise reuse of system design know-how. The know-how accumulated in the companies represents an intellectual asset, or property ('IP').
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System Specification Design Languages

[24] N. Faulhaber and R. Seepold, “A Flexible Classification Model for Reuse of Virtual Components”, Chap. 3 in Reuse Techniques for VLSI Design, Kluwer Academic Publishers, ISBN 3-8265-3417-4, pp. 21-36, 1999.

Author: Eugenio Villar

Publisher: Springer Science & Business Media

ISBN: 9780306487347

Category: Computers

Page: 340

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In this fourth book in the CHDL Series, a selection of the best papers presented in FDL'02 is published. System Specification and Design Languages contains outstanding research contributions in the four areas mentioned above. So, The Analog and Mixed-Signal system design contributions cover the new methodological approaches like AMS behavioral specification, mixed-signal modeling and simulation, AMS reuse and MEMs design using the new modeling languages such as VHDL-AMS, Verilog-AMS, Modelica and analog-mixed signal extensions to SystemC. UML is the de-facto standard for SW development covering the early development stages of requirement analysis and system specification. The UML-based system specification and design contributions address latest results on hot-topic areas such as system profiling, performance analysis and UML application to complex, HW/SW embedded systems and SoC design.C/C++-for HW/SW systems design is entering standard industrial design flows. Selected papers cover system modeling, system verification and SW generation. The papers from the Specification Formalisms for Proven design workshop present formal methods for system modeling and design, semantic integrity and formal languages such as ALPHA, HANDLE and B.
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System on Chip Methodologies Design Languages

The developed design flow and the accompanying proposed actions will form the platform to establish several qualification ... “A Flexible classification model for reuse of virtual components”, in Reuse Techniques for VLSI Designs, ...

Author: Peter J. Ashenden

Publisher: Springer Science & Business Media

ISBN: 9781475732818

Category: Computers

Page: 342

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System-on-Chip Methodologies & Design Languages brings together a selection of the best papers from three international electronic design language conferences in 2000. The conferences are the Hardware Description Language Conference and Exhibition (HDLCon), held in the Silicon Valley area of USA; the Forum on Design Languages (FDL), held in Europe; and the Asia Pacific Chip Design Language (APChDL) Conference. The papers cover a range of topics, including design methods, specification and modeling languages, tool issues, formal verification, simulation and synthesis. The results presented in these papers will help researchers and practicing engineers keep abreast of developments in this rapidly evolving field.
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Proceedings

Author: Workshop Reuse Techniques for VLSI Design. 2, 1998, Karlsruhe

Publisher:

ISBN: OCLC:314322461

Category:

Page: 139

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Advances in Case Based Reasoning

Reuse of Complex Electronic Designs Requirements Analysis for a CBR Application Ivo Vollrath Centre for Learning Systems and ... at the 2nd Workshop " Reuse Techniques for VLSI Design ” on September , 14th 1998 in Karlsruhe , Germany .

Author: Barry Smyth

Publisher: Springer Science & Business Media

ISBN: 3540649905

Category: Computers

Page: 482

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This book constitutes the refereed proceedings of the 4th European Workshop on Case-Based Reasoning, EWCBR-98, held in Dublin, Ireland, in September 1998. The 41 revised full papers presented were carefully selected and reviewed for inclusion in the proceedings. The contributions address the representation and organization of cases in case-bases, the assessment of case similarity, the efficient retrieval of cases from large case-bases, the adaptation of similar case solutions to fit the current problem, case learning and case-base maintenance, and the application of CBR technology to real-world problems.
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Reuse in Electronic Design

[ MeSt98 ] [ Moser94 ] [ Mous98 ] 9 Meyer zu Bexten , V. , Stuermer , A .: ' Design Reuse Experiment for Analog Modules - DREAM ' , Proc . 2nd GI / ITG / GMM - Workshop “ Reuse Techniques for VLSI Design ' , Karlsruhe , Germany , 14 ...

Author: Peter Conradi

Publisher: Wiley-Blackwell

ISBN: UOM:39015046504810

Category: Technology & Engineering

Page: 298

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Reuse in Electronic Design From Information Modelling to Intellectual Properties Peter Conradi Berlin, Germany Reuse of existing IC intellectual property blocks is currently the hot topic in electronic design automation. By cutting development time and improving designer productivity, reuse offers a faster time to market and consequently increased profitability. Conradi encompasses the fundamentals of physical system modelling, design methodologies and basic design architectures plus reuse strategies and tasks. Features include: * Graph-oriented visualisations enabling the reader to understand the requirements of future interdisciplinary design tools * Guidance on information modelling languages, system classification and decomposition of systems under development * Section on reuse strategies and tasks examining the practical aspects of the technique for both analogue and digital design * Data management and retrieval methods including the algebra of the selection process * Comprehensive appendices covering fine-grained design representations, VLSI design standards and data model extraction of a VHDL multiplier design This timely exposition of design capture and manipulation techniques will be a boon for postgraduate electronics students and researchers. CAD engineers and electronic designers will profit from the industry examples and the practical applications of the reuse cycle.
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Intellectual Property Protection in VLSI Designs

What makes IP protection a unique challenge is the new reuse-based design environment. ... we briefly review the reuse-based design methodology and discuss the need of protection techniques in embedded system design and VLSI (Very Large ...

Author: Gang Qu

Publisher: Springer Science & Business Media

ISBN: 9780306487170

Category: Technology & Engineering

Page: 183

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This overview of the security problems in modern VLSI design provides a detailed treatment of a newly developed constraint-based protection paradigm for the protection of VLSI design IPs – from FPGA design to standard-cell placement, and from advanced CAD tools to physical design algorithms.
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